Continuing to keep pace with the demands of Moore’s Law (where the number of transistors on a computer chip must double at an approximately a yearly cadence), the current era of semiconductor fabrication has entered the regime where the smallest transistor feature is on the order of single nanometers in size. The tiny transistor architecture is transferred onto silicon wafers by photolithography, a process by which light passes through a photomask (also known as a reticle) with the desired pattern and focused onto a silicon wafer. However, light passing through the photomask is not without its own challenges. One challenge in particular is known as the proximity effect where the relative proximity of features on a photomask has a drastic effect on the features size measured after printing. At Intel the Reticle Enhancement Technology (RET) team delivers photomasks that overcome the proximity effect using Optical Proximity Correction (OPC) to improve end of line yield. In this talk I will describe OPC and how we apply it on the RET team at Intel to keep pace with Moore’s Law. I will also share a bit about my own path starting as a physics student at a small liberal arts college and share some resources for internship and job opportunities at Intel.
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